Hypothetical: programmable photonic chip efficiency match ASICs. wat mean 4 btc? \ stacker news ~bitcoin

Hypothetical: programmable photonic chip efficiency match ASICs. wat mean 4 btc?

1567 sats \ 5 comments \ @DeltaClimbs 10 Feb bitcoin

Now, I'm not saying this is likely, but I am not familiar enough with this area to say definitively why it is not possible. See tweets:

Tweet references: https://www.quora.com/Why-are-FPGA-s-less-efficient-than-ASICs https://www.photonics.com/Articles/Programmable_Photonic_Chips_Adapt_PICs_to/a68811

The inability to do useful work while simultaneously mining has been described as critical to mining game theory, but has anyone considered ultra-efficient MEMS reconfigurability that allows switching between AI matrix multiplication and bitcoin SHA-256 on demand? Can any chip person say why it is certainly going to be X amount more expensive on either capex or opex?

If AI services and mining chips were the same chip, it seems like it might pose a massive centralization risk that could disrupt the efficient processing of transactions while the market cap of bitcoin remains small enough that other compute services are a much larger market.

Of course, this is not really a threat to bitcoin since even if AWS had chips that could flip to mining mode, if the US compelled them to 51% attack, it would only slow down transaction finality while causing unsustainable and highly costly damage to the economy. Of course, something being extremely foolish and costly is not a guarantee it will not work when dealing with emergent "actors" that are highly irrational.

If such chips were to come about, it then might be in the interest of all nations to use them and provide compute services. Moreover, it might mean that there would be a lot of value in being able to decouple the service layer from the hardware itself to ensure there is a global, liquid market for compute, if such a thing is possible (I know there have been various shitcoins over the years talking about such things).

Again, this is just a thought experiment.

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11 sats \ 1 reply \ @025738dda8 10 Feb

Adding programability to hardware always adds complexity and thus overhead. FPGAs have significant overhead when compared to ASICs. The difference is in the amount of components inside (transistors, wires, building blocks), distance of the components (how much time does it take for the signal to go through), maximal frequency (100-400 MHz for FPGAs, 1+GHz for ASICs), power consumption. For mining, the overhead is the key here.

With FPGA technology, you must adapt your circuit to the properties of certain chip family, its size, its building blocks, its maximal frequency. This is different from ASIC where you can in principle choose those properties, i.e. you adapt the technology to the needs of your circuit.

I believe that using photons instead of electrons just makes the signal transmissions faster. I.e. both FPGAs and ASICs might get faster. But the overhead does not disappear. To have a good reason for using programmable chips instead of hard-wired ones, there must be a significant advantage that over-weights the loss from higher power consumption or lower frequency or lower performance. Something like significantly cheaper FPGA chips that can for the same price over-weight the equivalent ASIC. Theoreticaly, you can catch it on the performance axis. But the power consumption would be a big issue here.

I am not expert in the photonic technology.

0 sats \ 0 replies \ @DeltaClimbs OP 10 Feb

Thanks, that is my gut-reaction as well... I am chatting with someone who I think may have an alternative view on the matter. I will be under an NDA to find out soon though, so I probably won't be able to discuss it much after.

5 sats \ 0 replies \ @tomlaies 10 Feb

If this was feasable (it's not) it would mean very little for Bitcoin. The armsrace would lead to equality of arms pretty quickly, bitcoins hashing difficulty would increase and everything continues as is tik tok next bock

0 sats \ 1 reply \ @endothermicdev 10 Feb

First off, I love lateral thinking like this.

However, I don't understand how MEMS is supposed to help here. The lithography processes used for MEMS and those used for high efficiency ICs are quite different. I.e., the minimum feature size of MEMS is about 2um versus 4nm or something for ICs. If I understand you correctly, you want to move logic blocks around with a transport system that's ~1000x bigger? Wouldn't it be simpler and more efficient to just include both the SHA256 and the matrix multiplication on the same die as parallel processes and only use what you need? I think it would use less die space and still allow the flexibility to switch operations while using the rest of the infrastructure. Maybe I'm missing something.

0 sats \ 0 replies \ @DeltaClimbs OP 10 Feb

I remember offhand something about photonic chips being something that can work well at the 100nm transistor size when I was looking at it a couple years ago, and that being an argument for greater decentralization since the fab costs would be much lower. I'm not sure what the size-efficiency relationship is like if you go past that.

My thought would also be parallel ASICs, shared power infrastructure would make more sense. Why do you save die space by having the two parallel systems be on the same chip?